? semiconductor components industries, llc, 2011 may, 2011 ? rev. 17 1 publication order number: mc74vhc1g07/d mc74vhc1g07 single non-inverting buffer with open drain output the mc74vhc1g07 is an advanced high speed cmos buffer with open drain output fabricated with silicon gate cmos technology. the internal circuit is composed of multiple stages, including a buffer and an open drain output which provides the capability to set the output switching level. this allows the mc74vhc1g07 to be used to interface any 2 v to 5.5 v circuit to circuits of any voltage between 1.5 v and 7 v using an external resistor and power supply. the mc74vhc1g07 input structure provides protection when voltages up to 7 v are applied, regardless of the supply voltage. features ? high speed: t pd = 3.8 ns (typ) at v cc = 5 v ? low internal power dissipation: i cc = 1 a (max) at t a = 25 c ? power down protection provided on inputs ? pin and function compatible with other standard logic families ? chip complexity: fets = 105 ? these devices are pb ? free and are rohs compliant v cc nc in a out y gnd in a out y 1 ovt figure 1. pinout figure 2. logic symbol 1 2 3 4 5 function table see detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ordering information l h a input y output l z pin assignment 1 2 3 gnd nc in a 4 5v cc out y http://onsemi.com marking diagrams v7 = device code m = date code* = pb ? free package sc ? 88a / sot ? 353 / sc ? 70 df suffix case 419a tsop ? 5 / sot ? 23 / sc ? 59 dt suffix case 483 v7 m 1 5 v7 m m (note: microdot may be in either location) *date code orientation and/or position may vary depending upon manufacturing location.
mc74vhc1g07 http://onsemi.com 2 maximum ratings symbol parameter value unit v cc dc supply voltage 0.5 to 7.0 v v in dc input voltage ? 0.5 to +7.0 v v out dc output voltage 0.5 to 7.0 v i ik dc input diode current 20 ma i ok dc output diode current v out gnd; v out v cc 20 ma i out dc output sink current, per pin 25 ma i cc dc supply current, v cc and gnd pin +50 ma t stg storage temperature range 65 to 150 c t l lead temperature, 1 mm from case for 10 seconds 260 c t j junction temperature under bias 150 c ja thermal resistance sc70 ? 5/sc ? 88a/sot ? 353 (note 1) sot23 ? 5/tsop ? 5/sc59 ? 5 350 230 c/w p d power dissipation in still air at 85 csc70 ? 5/sc ? 88a/sot ? 353 sot23 ? 5/tsop ? 5/sc59 ? 5 150 200 mw msl moisture sensitivity level 1 f r flammability rating oxygen index: 28 to 34 ul 94 v ? 0 @ 0.125 in v esd esd withstand voltage human body model (note 2) machine model (note 3) charged device model (note 4) 2000 200 n/a v i latchup latchup performance above v cc and below gnd at 125 c (note 5) 500 ma stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. measured with minimum pad spacing on an fr4 board, using 10 mm ? by ? 1 inch, 2 ? ounce copper trace with no air flow. 2. tested to eia/jesd22 ? a114 ? a. 3. tested to eia/jesd22 ? a115 ? a. 4. tested to jesd22 ? c101 ? a. 5. tested to eia/jesd78. recommended operating conditions symbol parameter min max unit v cc dc supply voltage 2.0 5.5 v v in dc input voltage 0.0 5.5 v v out dc output voltage 0.0 7.0 v t a operating temperature range 55 125 c t r , t f input rise and fall time v cc = 3.3 v 0.3 v v cc = 5.0 v 0.5 v 0 0 100 20 ns/v device junction temperature versus time to 0.1% bond failures junction temperature c time, hours time, years 80 1,032,200 117.8 90 419,300 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 1 1 10 100 1000 failure rate of plastic = ceramic until intermetallics occur figure 3. failure rate vs. time junction temperature normalized failure rate time, years t j = 130 c t j = 120 c t j = 110 c t j = 100 c t j = 90 c t j = 80 c
mc74vhc1g07 http://onsemi.com 3 dc electrical characteristics symbol parameter test conditions v cc (v) t a = 25 c t a 85 c 55 c t a 125 c unit min typ max min max min max v ih minimum high ? level input voltage 2.0 3.0 4.5 5.5 1.5 2.1 3.15 3.85 1.5 2.1 3.15 3.85 1.5 2.1 3.15 3.85 v v il maximum low ? level input voltage 2.0 3.0 4.5 5.5 0.5 0.9 1.35 1.65 0.5 0.9 1.35 1.65 0.5 0.9 1.35 1.65 v v ol maximum low ? level output voltage v in = v ih or v il v in = v il i ol = 50 a 2.0 3.0 4.5 0.0 0.0 0.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 v v in = v il i ol = 4 ma i ol = 8 ma 3.0 4.5 0.36 0.36 0.44 0.44 0.52 0.52 i lkg z ? state output leakage current v in = v ih v out = v cc or gnd 5.5 0.25 2.5 5.0 a i in maximum input leakage current v in = 5.5 v or gnd 0 to 5.5 0.1 1.0 1.0 a i cc maximum quiescent supply current v in = v cc or gnd 5.5 1.0 20 40 a i off power off ? output leakage current v out = 5.5 v v in = 5.5 v 0 0.25 2.5 5 a ac electrical characteristics input t r = t f = 3.0 ns t a = 25 c t a 85 c 55 c t a 125 c symbol parameter test conditions min typ max min max min max unit ???? ???? ???? t pzl ?????? ?????? ?????? ???????? ???????? ???????? 0.3 v c l = 15 pf r l = r i = 500 c l = 50 pf ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ?? ?? ?? ???? ???? ???? ?????? ?????? ?????? ???????? ???????? ???????? 0.5 v c l = 15 pf r l = r i = 500 c l = 50 pf ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ?? ?? ?? ???? ???? ???? ?????? ?????? ?????? ???????? ???????? ???????? 0.3 v c l = 50 pf r l = r i = 500 ??? ??? ??? ??? ??? ??? 7.5 ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ?? ?? ?? ???? ???? ?????? ?????? ???????? ???????? 0.5 v c l = 50 pf r l = r i = 500 ??? ??? ??? ??? 5.3 ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ?? ?? ???? ???? ???? ?????? ?????? ?????? ???????? ???????? ???????? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ?? ?? ?? typical @ 25 c, v cc = 5.0 v c pd power dissipation capacitance (note 6) 18 pf 6. c pd is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption with out load. average operating current can be obtained by the equation: i cc(opr ) = c pd v cc f in + i cc . c pd is used to determine the no ? load dynamic power consumption; p d = c pd v cc 2 f in + i cc v cc .
mc74vhc1g07 http://onsemi.com 4 figure 4. switching waveforms r l 1.5 v to 7 v ovt v cc a 50% 50% v cc t pzl t plz v ol 0.3 v v cc gnd high impedance *includes jig and probe capacitance. r l = r 1 = 500 figure 5. test circuit figure 6. output voltage mismatch application a y r l a c l * r 1 v cc 2 f = (a ? b ) (c d ) e v cc 2.2 k 220 figure 7. complex boolean functions figure 8. led driver figure 9. gtl driver a b c d e mc74vhc1g01 mc74vhc1g03 mc74vhc1g07 a 1 2 3 5 4 v cc v cc r led mc74vhc1g07 a 3.3 v 1.5 v gtl ordering information device package shipping ? mc74vhc1g07dft1g sc70 ? 5/sc ? 88a/sot ? 353 (pb ? free) 3000/tape & reel mc74vhc1g07dft2g sc70 ? 5/sc ? 88a/sot ? 353 (pb ? free) MC74VHC1G07DTT1G sot23 ? 5/tsop ? 5/sc59 ? 5 (pb ? free) ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
mc74vhc1g07 http://onsemi.com 5 package dimensions notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. 419a ? 01 obsolete. new standard 419a ? 02. 4. dimensions a and b do not include mold flash, protrusions, or gate burrs. dim a min max min max millimeters 1.80 2.20 0.071 0.087 inches b 1.15 1.35 0.045 0.053 c 0.80 1.10 0.031 0.043 d 0.10 0.30 0.004 0.012 g 0.65 bsc 0.026 bsc h --- 0.10 --- 0.004 j 0.10 0.25 0.004 0.010 k 0.10 0.30 0.004 0.012 n 0.20 ref 0.008 ref s 2.00 2.20 0.079 0.087 b 0.2 (0.008) mm 12 3 4 5 a g s d 5 pl h c n j k ? b ? sc ? 88a (sc ? 70 ? 5/sot ? 353) case 419a ? 02 issue k
mc74vhc1g07 http://onsemi.com 6 package dimensions tsop ? 5 case 483 ? 02 issue h notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. 4. dimensions a and b do not include mold flash, protrusions, or gate burrs. 5. optional construction: an additional trimmed lead is allowed in this location. trimmed lead not to extend more than 0.2 from body. dim min max millimeters a 3.00 bsc b 1.50 bsc c 0.90 1.10 d 0.25 0.50 g 0.95 bsc h 0.01 0.10 j 0.10 0.26 k 0.20 0.60 l 1.25 1.55 m 0 10 s 2.50 3.00 123 54 s a g l b d h c j 0.7 0.028 1.0 0.039 mm inches scale 10:1 0.95 0.037 2.4 0.094 1.9 0.074 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.20 5x c ab t 0.10 2x 2x t 0.20 note 5 t seating plane 0.05 k m detail z detail z on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 mc74vhc1g07/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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